ASIC Consulting, Design & Development

BitSim offers consulting in the area of specialized electronics development for devices such as FPGA, ASIC and PLD. We believe it makes a significant difference in time-to-market if experienced engineers are used. This reduces development time to a minimum at the same time as quality is ensured in the end result. In developing we use both Verilog and VHDL, verifying building self checking test benches using Verilog, VHDL or "e" as well as modeling in System C. Some simulation tools are Modelsim^TM  from Mentor Grahics and Incisive®  from Cadence. For synthesis and static timing constrainting we use tools from Synopsys (Design Compiler^TM, Prime Time^TM). For design for testability issues we use DFT Advisor^TM, FastScan^TM from Mentor Graphics and Tetramax^TM from Synopsys.