HIPPO

High Speed FPGA evaluation board

HIPPO is an evaluation board used to explore the high-speed data capabilities of the Xilinx Virtex-II Pro FPGAs. The built-in Serdes transceivers provide the possibility to implement standard high-speed interfaces, running att serial data communication speeds at up to 3.125 Gbit/s. Interfaces provided include XAUI (10GBE), RapidIO (serial and parallel), Infiniband, Fiber Channel, Gigabit Ethernet, PL-4, Serial ATA and Hypertransport. A PowerPC405 processor is also available, embedded in the Virtex-II Pro FPGA. The board is a standard full length PCI board. HIPPO can if needed be equipped with an application specific daughter board for custom I/O. A smaller Spartan FPGA is interfacing to the PCI bus. There is a local bus interconnecting the Spartan FPGA, the Virtex-II Pro FPGA and the daughter board. HIPPO is equipped with DDR SDRAM, ZBT SRAM and Flash memory. The SDRAM memory is typically used by the PowerPC processor, while the ZBT SRAM memory is intended for high bandwidth applications, such as video and signal processing. The Flash memory stores the FPGA configuration as well as the processor software. Several boards can be fitted into a standard PC and communicate via the Xilinx Aurora serial back plane bus, using the BitSim Mini Backplane. The PCI connection to the PC processor gives extra flexibility and makes it possible to build very powerful platforms intended for demanding applications. To support applications with even more requirements, the board holds a Gigabit Ethernet Opto Module for expansion to yet another PC.